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Date: 02-14-05

Title: ASSET® integrates Lattice’s in-system configuration engine into its ScanWorks® JTAG system


ASSET® integrates Lattice’s in-system configuration engine into its ScanWorks® JTAG system

 

Concurrent programming of multiple logic devices can increase efficiency by 30 percent

 

Richardson, TX (Feb. 14, 2005) – ASSET InterTech Inc., (www.asset-intertech.com) an international leader in boundary-scan (JTAG/IEEE 1149.1) test and in-system programming (ISP), has integrated into its ScanWorks boundary scan environment Lattice Semiconductor’s ispVM System, a programming engine that supports the IEEE 1532 Standard for In-System Configuration.

 

The same ScanWorks system that applies boundary scan tests to an assembled circuit board can also program multiple on-board logic devices concurrently, reducing programming time and increasing the efficiency of manufacturing operations. Benchmark tests by ASSET have shown that programming times can be reduced by 30 percent or more.

 

Lattice Semiconductor, Hillsboro, OR, designs, develops and markets a broad range of programmable logic devices and software design tools. ASSET’s easy yet powerful ScanWorks boundary-scan test and ISP environment is currently used by leading electronics companies such as Cisco, Lucent Technologies, Alcatel, Agilent, BAE, Hewlett-Packard, Ericsson, Intel, Raytheon, Solectron, Rockwell Collins, SBS, EMC and others.

 

The new ScanWorks with 1532 concurrent programming capabilities has been trialed at Alcatel, a global supplier of communications equipment.

 

“From our experience with it, we can see that the concurrent programming capability of ScanWorks with IEEE 1532 has the potential to  save our organization considerable time,” said Doug Way, test engineer at Alcatel and a member of the IEEE working group that developed the IEEE 1532 specification. “The integration of IEEE 1532 capabilities into ScanWorks is very seamless. As a result, ScanWorks makes IEEE 1532 easy to use.”

 

Dave Bonnett, ASSET’s technical marketing manager, served as vice chairman of the IEEE 1532 working group.

 

“The IEEE 1532 working group tried to address the in-system configuration needs of the boundary-scan community as well as PLD tools vendors and the suppliers of in-circuit test (ICT) systems,” Bonnett said. “Being based on an industry standard allows the 1532 methodology to be deployed across a variety of test technologies. For example, designers can use 1532 on ScanWorks stations during development, manufacturing and test engineers can also tap into 1532 on ScanWorks manufacturing stations and, in addition,  technicians can utilize 1532  during high volume manufacturing on a ScanWorks for the Agilent 3070 ICT system.”

 

The IEEE 1532 standard uses the JTAG infrastructure on a circuit board to access on-board programmable logic devices (PLDs) and field programmable gate arrays (FPGAs) to load programming or configuration data into them. If multiple IEEE 1532 programmable devices are present, they all can be configured simultaneously, drastically reducing the time it would take to program each device one after the other. With Lattice’s ispVM System programming engine, ASSET’s ScanWorks is able to program any PLD or FPGA that conforms to the IEEE 1532 standard regardless of the supplier of the device.

 

“Our arrangement with Lattice demonstrates the strategic directions we have undertaken for ASSET as a company and ScanWorks as a boundary scan technology,” said Alan Sguigna, vice president of sales and marketing for ASSET InterTech. “First, bringing best-in-class solutions to our users is our foremost objective and sometimes that means forming strategic relationships and integrating technologies from other companies, like Lattice, Agilent or International Test Technologies. In other cases, the best-in-class technology we deliver is developed by ASSET, such as Intel® IBIST or 1149.6 high-speed bus testing. All that matters to our users is that we deliver best-in-class solutions and that’s what we’re doing. Second, integrating the ispVM System engine into ScanWorks shows that being focused on boundary scan has paid off handsomely because we are able to easily integrate best-in-class capabilities into the ScanWorks environment. Without a solid JTAG infrastructure, it wouldn’t be so easy and our users would have to wait considerably longer for us to respond to their needs.”

 

The ispVM System engine has been seamlessly integrated into ScanWorks so that the in-system configuration capabilities of IEEE 1532 have the same look and feel as all other ScanWorks operations. ispVM System draws on the same boundary-scan path descriptions that other ScanWorks operations do and it is able to target configuration data to PLDs at any level in the system’s hierarchy. To execute an IEEE 1532 programming operation, the user sets the options defined in the standard and these are saved as a ScanWorks action. This action then can be applied to a circuit board containing IEEE 1532 programmable devices at the same time as other ScanWorks test and programming actions are applied during the manufacturing process.

 

“We are very pleased that ASSET has chosen to integrate ispVM System into the ScanWorks environment,” said Steve Stark, director of marketing for Lattice. “ispVM System has established a leadership position in the marketplace, and now we are providing key functionality for a leading boundary scan system. We look forward to working closely with ASSET to ensure the continued success of ScanWorks and the ispVM System.”

 

Pricing and Availability

 

ScanWorks with the ispVM engine and support for IEEE 1532 Concurrent In-System Configuration is available now from ASSET's direct sales force and its global network of resellers. Limited-term licensing for ScanWorks begins at $6,000. Standard and network licenses are also available, ensuring flexible pricing options and low cost of ownership.

 

About Lattice Semiconductor

Lattice Semiconductor Corporationdesigns, develops and markets the broadest range of Field Programmable Gate Arrays(FPGA), Field Programmable System Chips(FPSC) and high-performance Programmable Logic Devices(PLD), including Complex Programmable Logic Devices(CPLD), Programmable Mixed-Signal Products(ispPACâ), and Programmable Digital Interconnect Devices (ispGDXâ).  Lattice also offers industry leading SERDES products.  Lattice is “Bringing the Best Together” with comprehensive solutions for today's system designs, delivering innovative programmable silicon products that embody leading-edge system expertise.

 

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, go to http://www.latticesemi.com.

 

About ASSET InterTech

 

ASSET InterTech, Inc. develops, markets, sells, and supports boundary-scan testability and in-system programming (ISP) products worldwide. ASSET’s affordable ScanWorks® environment is easy yet powerful. It allows users to quickly and easily test semiconductors, circuit boards or entire systems during every phase of a product's life, including design, manufacturing/repair and field maintenance. The ISP capabilities of ScanWorks can be used to load software or data into programmable devices after they have been connected to a printed circuit board. The ScanWorks product family works in conjunction with a standard of the International Electronics and Electrical Engineering (IEEE) society known as the IEEE 1149.1 (JTAG) boundary-scan test specification. ASSET InterTech is located outside of Dallas, TX, at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

 

For product information, call toll free 888-694-6250, send faxes to 972-437-2826, direct e-mail to sales@asset-intertech.comor visit the company’s Web site at www.asset-intertech.com.

 

 

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MEDIA CONTACTS:

Bob Greenfield, G&A PR                     972/254-2887  bob.greenfield@verizon.net

Alan Sguigna, ASSET                         972/664-3105  asguigna@asset-intertech.com

 

 

 

TRADEMARKS:

ASSET and ScanWorks are registered trademarks and the ASSET logo is a trademark of ASSET InterTech, Inc. All other trade and service marks are the properties of their respective owners.

 






































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